ASIC Verification Engineering Manager

17 hours ago

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Description

• Responsible for leading ASIC Design Verification Team. • Deliver block level and full chip verification and emulation activities with high quality. • Oversee verification test planning, execution, and development of innovative verification methodologies. • Drive functional and code coverage closure. • Collaborate closely with RTL, architecture, software/firmware, emulation, and post-silicon validation teams. • Contribute to the development and execution of a DV strategy for first pass silicon success. • Hire, train, and support a team of ASIC engineers for timely and cost-effective product development. • Manage team aspects to support organizational goals.

Requirements

• 15 + years ’ experience in ASIC/SoC design verification. • 5 + years ’ experience leading a team of direct reports. • Expertise in design verification tools such as Synopsys VCS and Verdi. • Proven success in first-pass ASIC development. • Experience managing multiple projects and adjusting priorities with stakeholders. • Proficiency in developing UVM constrained random test benches. • Strong understanding of interpreting functional specifications and creating comprehensive test plans. • B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience.

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