Digital Design Engineer - IP

5 days ago

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Analogue Insight™

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Analogue Insight™ is a company established in early 2024, specializing in bridging the analogue and digital worlds through advanced Chiplet solutions. They focus on the development of cutting-edge Chiplet technology that acts as a foundational element for sophisticated communication systems. With expertise in System on Chip (SoC) architecture, Analogue Insight provides custom SoC and IP design, licensing, and various design services aimed at enhancing performance, scalability, and integration flexibility for their clients. Their services include consulting, business development, and training, all tailored to meet the complex demands of modern computation and connectivity in technology.

chiplet • analog design • digital design • RF • Transceivers

2 - 10 employees

Founded 2024

🔧 Hardware

📡 Telecommunications

🤖 Artificial Intelligence

📋 Description

• Fully remote role in a digital design engineering team focused on advanced technology. • Lead the design and development of complex System-on-Chip (SoC) architectures. • Drive high-performance silicon chips that power next-generation technologies. • Collaborate on cutting-edge products enhancing performance and reliability.

🎯 Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. • 8+ years of experience in SoC design and development. • Proven track record of leading successful SoC projects from concept to volume production. • Strong expertise in RTL design using Verilog or SystemVerilog. • Proficient in SoC verification methodologies and tools (UVM, SystemVerilog, C/C++, Coco-TB, etc.). • Experience with synthesis, place-and-route, and timing analysis. • Familiarity with Design-for-Test and Design-for-Debug ideas and architecture. • Familiarity with embedded software development and hardware/software co-design. • Excellent problem-solving skills and attention to detail. • Strong communication and leadership skills, with the ability to work effectively in a team environment. • Experience with advanced process nodes (e.g., 7nm, 5nm) is preferred. • Knowledge of low-power design techniques is preferred. • Experience with CPU (ARM and RISCV) integration is preferred. • Experience with DSP design is preferred. • Experience with high-speed interface design (MIPI, PCIe, UCIe, DDR, Ethernet, etc.) is preferred. • Familiarity with EDA tools from vendors such as Synopsys, Cadence, or Mentor Graphics is preferred.