ASIC Design Engineering Manager
Yesterday
Description
• Lead the ASIC RTL Design Team and deliver high-quality SoC designs. • Oversee design activities, including microarchitecture, RTL development, and debug support. • Collaborate closely with architecture, verification, software, and validation teams. • Contribute to strategy development for first pass silicon success. • Manage hiring, training, and support of ASIC engineers for timely product development.
Requirements
• 15+ years’ experience in ASIC/SoC design. • 7+ years’ experience leading a team of direct reports. • Expertise in RTL design, verification and debug tools such as Synopsys Spyglass, VCS, Verdi, DC. • Good understanding of Fusion compiler, Primetime, Formality, Conformal. • Expertise in revision control systems such as Git, SVN, etc. • Proven success in first-pass ASIC development. • Experience managing multiple projects and adjusting priorities with stakeholders. • Strong understanding of interpreting functional specifications and creating comprehensive test plans.
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