March 19
• Play a crucial role in designing and implementing FPGA-based digital solutions for the controller of SAR Payload • Develop RTL code for FPGA-based digital designs • Design micro-architecture and code assigned modules in VHDL/Verilog • Debug code using tools like ChipScope • Create test benches for verifying design • Perform FPGA debugging and hardware/software integration
• B.Tech/MS/M.Tech. in computer or electrical engineering, or related field • 4+ years of experience completing FPGA projects • Hands-on coding experience in VHDL and/or Verilog • Experience targeting Xilinx and Microchip FPGAs • Expertise implementing designs with multiple clock domains • Deep understanding of coding styles for FPGAs • Experience in RTL implementation of DSP algorithms • Familiarity with interfaces like JESD, UART, Aurora, DRAM, SRAM, etc.
• Opportunity to work on cutting-edge technology in collaboration with NASA and US Space Force • Significant investments from prominent backers in India • Part of Earth Observation Satellite Payload Development Team
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