Senior ASIC Design Engineer

October 5

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Ethernovia

51 - 200

💰 $64M Series A on 2023-05

Description

• Responsible for all aspects of digital SoC design • Work with system architects and engineers to design and deliver advanced automotive communication semiconductors • Define advanced, high-performance custom silicon • Flesh out product definitions for ASIC • Trusted self-starter who can work with little guidance

Requirements

• BS and/or MS in Electrical Engineering, Computer Science, or related field • Minimum 10+ years of ASIC RTL design and/or architecture experience • Proven track record with the development of complex SoCs • Strong understanding of digital design fundamentals and methodologies • In-depth knowledge of Verilog/System Verilog and simulation tools. • Self-motivated and able to work effectively both independently and in a team

Benefits

• Pre IPO stock options • Competitive base salary • Flexible hours • Medical, dental and vision insurance for employees • Flexible vacation time to promote a healthy work-life balance

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