DRAM Memory Principal Design Engineer

December 4

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Talent Management • Talent Acquisition • Talent Intelligence • Machine Learning • Artificial Intelligence

201 - 500 employees

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Description

• Build solutions and define requirements for circuit operation • DFM is a key focus • Look for opportunities to drive competitive advantages into our solutions • Develop groundbreaking ideas and concepts • Assist in the design and development of schematic blocks such as memory array • Understand the impact of design architecture decisions on overall power, speed, and die size • Import layout parasitic information into the circuit simulation environment

Requirements

• BSEE or Greater • 6+ years of related experience • Simulation experience using analog and digital tools • Debug circuits based on both simulation and silicon results • Good understanding of high-speed logic and clock design • Assist with overall design, layout, and optimization of memory circuits • Perform circuit simulations using standard industry tools such as SPICE and VERILOG • Able to interpret device specifications to produce required functionality

Benefits

• Choice of medical, dental and vision plans • Benefit programs to protect income during illness or injury • Paid family leave • Robust paid time-off program • Paid holidays