Design Verification Engineer
October 7
Description
• We are looking for enthusiastic engineers to join the CPU/IP/SoC verification team. • Working closely with the local design team, you will be responsible for verifying subsystems such as caches, memories, and interconnects, as well as their integration into the larger SoC. • We are looking for highly talented, self-motivated, and versatile engineers that will push hardware to the highest performance and quality standards.
Requirements
• Ability to clearly communicate across teams with multidisciplinary backgrounds • BS or MS in EE • 3+ years of experience in CPU, IP or SoC verification • Knowledge of high-level verification flow methodology (testplan development, constrained random test generation and debug, coverage analysis and closure) • Experience with a class-based testbench using SystemVerilog or similar language • Knowledge of memory coherence, DDR, AXI/ACE is required • Experience with UVM/OVM is required • Experience with C/C++ and assembly is a plus • Experience with Python, Perl, or other scripting languages is a plus
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