Senior ASIC Verification Engineer - Coherent High Speed Interconnect

March 10

🏄 California – Remote

Although this job is listed in California, this company may be open to hiring remote in other states.

🍂 Massachusetts – Remote

Although this job is listed in Massachusetts, this company may be open to hiring remote in other states.

+1 more states

🏄 California – Remote 🍂 Massachusetts – Remote 🤠 Texas – Remote

💵 $136k - $264.5k / year

⏰ Full Time

🟠 Senior

👷🏻‍♀️ Engineer

🦅 H1B Visa Sponsor

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NVIDIA

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NVIDIA is a leading technology company specializing in accelerated computing and artificial intelligence. NVIDIA pioneers advancements in graphical processing units (GPUs), cloud computing, data centers, and virtual reality, with a focus on gaming, automotive, healthcare, and robotics industries. The company's innovations, such as NVIDIA Omniverse, transform traditional digital processes by enabling high-fidelity simulations and rendering tasks. Their applications span various industries, from autonomous vehicles using NVIDIA DRIVE to healthcare solutions with NVIDIA Clara, and AI-driven analytics and workflows.

GPU-accelerated computing • artificial intelligence • deep learning • virtual reality • gaming

10,000+ employees

Founded 1993

🤖 Artificial Intelligence

🎮 Gaming

📋 Description

• Verify the design and implementation of high speed coherent interconnects • Responsible for micro-architecture using sophisticated verification methodologies • Collaborate with architects, designers, emulation, and silicon verification teams

🎯 Requirements

• Bachelors or Master’s Degree (or equivalent experience) • 3+ years of relevant verification experience • Experience in architecting test bench environments for unit level verification • Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies • Prior Design or Verification experience of Coherent high-speed interconnects • Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI will be useful • Strong background developing TB's from scratch using SV and UVM methodology is desired • C++ programming language experience, scripting ability and an expertise in System Verilog • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB) • Strong debugging and analytical skills • Experienced communication and interpersonal skills are required • A history of mentoring junior engineers and interns a huge plus

🏖️ Benefits

• Eligible for equity and benefits