Junior Digital Design Engineer

September 6

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Qualinx B.V.

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Qualinx is a high-tech fabless semiconductor company that solved a high power consumption problem of GNSS sensors.

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💰 Series A on 2023-02

Description

• Join a dynamic startup focused on revolutionizing radio chip technology. • Responsible for simulation and verification of digital blocks in RTL. • Develop test benches and test cases for block-level functional verification. • Collaborate with teams to address synthesis, timing, and DFT issues for ASIC implementation. • Analyze circuits for failure root cause and propose solutions.

Requirements

• 1+ years of experience in ASIC verification, System Verilog, UVM, Verilog. • Experience with EDA tools (Cadence, Mentor) and design languages including Verilog. • Understanding of design integration activities like Lint, CDC, Synthesis & ECO. • Experience in designing mixed-signal products containing analog building blocks and microcontrollers. • Experience with RTL and ultra-low-power designs. • Good knowledge of digital design flow from architecture design to sign-off. • Understanding of synthesis, static timing analysis, and netlist verifications. • Programming and scripting skills: MATLAB, C/C++, Tcl. • Knowledge of clock domain crossing (CDC) techniques. • Understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back annotation of parasitics, gate level simulation. • Understanding of ASIC test methodology such as scan insertion, memory BIST and test pattern generation. • Strong analytical, problem-solving skills. • Ability to work effectively in a fast-moving and dynamic environment. • Experience with SoC and wireless communications is a plus.

Benefits

• Stock Appreciation Rights to profit from Qualinx's success. • 2% additional monthly base salary for pension savings. • 25 vacation days based on a 40-hour workweek. • Modern office with necessary equipment. • Quarterly social events for team bonding. • Monthly Lunch & Learn sessions for employee development.