Cornelis Networks is a leading provider of intelligent, scalable, high-performance interconnects designed for AI applications. The company specializes in delivering end-to-end purpose-built high-performance fabrics to commercial, scientific, academic, and government organizations. Cornelis Networks’ solutions are aimed at enhancing performance, scalability, and efficiency across hyperscale, cloud AI, and on-premises AI/HPC environments. Their offerings are known for scalable architecture, high bandwidth solutions, and universal compatibility with accelerators and GPUs. Originating as an Intel spin-off, the company is positioned to challenge existing technologies like InfiniBand and Ethernet, providing advanced interconnects that power modern AI infrastructure.
March 26
Cornelis Networks is a leading provider of intelligent, scalable, high-performance interconnects designed for AI applications. The company specializes in delivering end-to-end purpose-built high-performance fabrics to commercial, scientific, academic, and government organizations. Cornelis Networks’ solutions are aimed at enhancing performance, scalability, and efficiency across hyperscale, cloud AI, and on-premises AI/HPC environments. Their offerings are known for scalable architecture, high bandwidth solutions, and universal compatibility with accelerators and GPUs. Originating as an Intel spin-off, the company is positioned to challenge existing technologies like InfiniBand and Ethernet, providing advanced interconnects that power modern AI infrastructure.
• Deliver world’s highest performance networking solutions for AI and HPC datacenters. • Develop and deploy emulation models and runtime flows. • Support the enablement and validation of advanced PCIe and Ethernet interfaces. • Work closely with ASIC, firmware, and software teams. • Contribute to developing automation solutions. • Provide hands-on support to Design and DV teams. • Demonstrate debugging ability for hardware and software designs.
• 10+ years in ASIC design, verification, and emulation. • 4+ years of hands-on experience with leading emulation platforms, strong preference for Cadence Palladium. • Solid experience with SystemVerilog and UVM for design and verification. • Experience with transactor debugging and development is a plus. • Proven ability to debug in a combined hardware/software design environment. • Strong automation skills including proficiency in scripting languages (TCL, Python, Perl, Shell). • Familiarity with version control systems (git), project management tools (Jira). • Strong communication skills. • Bachelor’s or master’s degree in computer engineering, Computer Science, or Electrical Engineering.
• Competitive compensation package including equity, cash, and incentives. • Health and retirement benefits. • Medical, dental, and vision coverage. • Disability and life insurance. • Dependent care flexible spending account. • Accidental injury insurance. • Pet insurance. • Generous paid holidays. • 401(k) with company match. • Open Time Off (OTO) for regular full-time exempt employees. • Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
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