Senior ASIC Design Engineer

October 5

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Ethernovia

51 - 200

πŸ’° $64M Series A on 2023-05

Description

β€’ Responsible for all aspects of digital SoC design β€’ Work with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver advanced automotive communication semiconductors and systems β€’ Leading edge of the development and definition of advanced, high-performance custom silicon β€’ Expected to flesh out product definitions with precise specifications β€’ Trusted self-starter who can work with very little guidance or oversight

Requirements

β€’ BS and/or MS in Electrical Engineering, Computer Science, or related field β€’ Minimum 10+ years of ASIC RTL design and/or architecture experience β€’ Proven track record with the development of complex SoCs β€’ Strong understanding of digital design fundamentals and methodologies β€’ In-depth knowledge of Verilog/System Verilog and simulation tools β€’ Self-motivated and able to work effectively both independently and in a team

Benefits

β€’ Medical, dental and vision insurance for employees β€’ Flexible vacation time to promote a healthy work-life balance β€’ Paid parental leave to support you and your family β€’ Technology depth and breadth expansion that can’t be found in a large company β€’ Opportunity to grow your career as the company grows β€’ Pre IPO stock options β€’ Cutting edge technology β€’ World class team β€’ Competitive base salary β€’ Flexible hours

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