Senior ASIC Design Engineer

October 5

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Logo of Ethernovia

Ethernovia

51 - 200 employees

📡 Telecommunications

💰 $64M Series A on 2023-05

Description

• Responsible for all aspects of digital SoC design • Work with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver advanced automotive communication semiconductors and systems • Leading edge of the development and definition of advanced, high-performance custom silicon • Expected to flesh out product definitions with precise specifications • Trusted self-starter who can work with very little guidance or oversight

Requirements

• BS and/or MS in Electrical Engineering, Computer Science, or related field • Minimum 10+ years of ASIC RTL design and/or architecture experience • Proven track record with the development of complex SoCs • Strong understanding of digital design fundamentals and methodologies • In-depth knowledge of Verilog/System Verilog and simulation tools • Self-motivated and able to work effectively both independently and in a team

Benefits

• Medical, dental and vision insurance for employees • Flexible vacation time to promote a healthy work-life balance • Paid parental leave to support you and your family • Technology depth and breadth expansion that can’t be found in a large company • Opportunity to grow your career as the company grows • Pre IPO stock options • Cutting edge technology • World class team • Competitive base salary • Flexible hours

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