Senior ASIC Design Engineer

September 15

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NVIDIA

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GPU-accelerated computing • artificial intelligence • deep learning • virtual reality • gaming

10,000+

Description

• Implement, document and deliver high performance, area and power efficient RTL. • Analyze architectural trade-offs based on features, performance requirements and system limitations. • Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. • Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams. • Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines. • Architect features to help silicon debug and support post-silicon validation activities.

Requirements

• Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science. • 8+ years of meaningful work experience. • Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches. • Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. • Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required. • Strong interpersonal skills and an excellent teammate. • Strong C/C++, Python or Perl skills. • Good debugging and analytical skills.

Benefits

• Eligible for equity • Benefits